Hewlett-Packard 5061-30xx Series  
Written by Accutron on 2007-06-02  

Devices included in this entry:

HP A5061-3010 hybrid microprocessor (82-pin ceramic LCC)
HP 5061-3011 No-EMC variant hybrid microprocessor (82-pin ceramic LCC; pictured in thumbnail)
HP D5062-3001 AEC variant hybrid microprocessor (107-pin ceramic LCC)
HP D5062-3001 AEC variant hybrid microprocessor (107-pin ceramic LCC)
HP C5061-3012 TACO tape drive controller (56-pin ceramic LCC)
Hewlett-Packard A5061-3020 shift register (89-pin ceramic LCC)
Hewlett-Packard C5061-3055 ROM (40-pin ceramic LCC)

The 5061-3010 is an extremely advanced 16-bit, 10 MHz hybrid microprocessor, developed as the CPU of the Hewlett-Packard 9825A desktop calculator. Though it originated at HP's calculator division in Loveland, Colorado, the 5061-3010 is no mere calculator chip. When HP sets out to design a microprocessor, they come back with a 100kg minicomputer, squeezed into a volume about the size of a pack of cigarettes, heatsink included.

The core of the 5061-3010 consists of three NMOS chips: the binary processor chip (BPC), extended math chip (EMC) and the input/output controller (IOC). The BPC is basically a single-chip version of a HP minicomputer, utilizing the core 211X set of 59 instructions. The EMC handles another 15 instructions, dealing mostly with BCD math, and the IOC performs 12 I/O instructions. Each NMOS die is approximately 4.7mm on a side, the total surface area about 66mm^2. HP's NMOS II fabrication process, specifically developed for the manufacture the 5061-3010, could not support larger dies without annihilating chip yields.

HP also manufactured a number of different 5061-30xx hybrid NMOS support chips in leadless chip carriers, including specialized controllers and memory devices. Additionally, the hybrid package style was chosen for the HP-80 financial calculator hybrid ROM (1813-0024), and the HP-65 programmable calculator hybrid CPU (00065-60218).

The first completed BPC masks taped out on April 8, 1973, and HP had a fully functional microprocessor before the end of the year. The BPC was birthed just ahead of National Semiconductor's laughably slow PMOS-based PACE design, widely miscredited as the first 16-bit single-chip microprocessor. The BPC is also noted as the first NMOS microprocessor and the first microprogrammed microprocessor. Intel would not arguably surpass the HP hybrid microprocessor until the release of the 80286 in 1982.

The hybrid microprocessor package is a completely unique ceramic LCC with 82 gold pins and a metal lid. The microprocessor also has a large heatsink, affectionately referred to by HP engineers as the 'Honda cylinder head'. Even when shrunken down to pocket size, HP minicomputers still have a requisite shell of cast aluminum.

There is surprisingly little available information about the HP hybrid microprocessor. HP never licensed the device to other companies, condemning it to historical obscurity in spite of its extremely high technological significance. Most so-called CPU museums ignore its existence altogether, preferring instead to document yet another Intel chip. Even the Smithsonian fails to document the BPC, alternately regurgitating a secondary source which erroneously credits PACE as the first 16-bit microprocessor.

The first version of the hybrid microprocessor was the 09825-67907, used in early 9825A systems and the 3585A Spectrum Analyzer. HP soon revised this original design to correct a well-documented ground bounce problem. This revised design is the 5061-3010, first used in the 9825B, and as the language processor (LPU) in the 9845A computer. Along with the -3010, HP introduced the 5061-3011, a variant of the -3010 which omits the EMC, intended for use as the I/O processor in the HP 9845A. The -3011 was later used as the CPU in the 64000 and 64100 Logic Development Systems and the 4955A Protocol Analyzer. HP then introduced the 5061-3001, a 107-pin enhancement of the -3010 which adds an Address Extension Chip (AEC). The -3001 was first used as the CPU in the 9835A and 9835B, and a dual -3001 configuration was employed in the 9845B and 9845C. Two other lesser known 82-pin variants of the hybrid microprocessor were used in the HP 250 multiuser business computer (5061-3043) and in the 8566A and 8568A Spectrum Analyzers (5061-4204).

The HP hybrid microprocessor had a number of other relatives which shared various technologies. The BPC was manufactured as a standalone product (1818-2500), packaged in a 40-pin cerDIP. The TACO tape drive controller (5061-3012), used in the 9845 and 4955A, was fabricated using a newer NMOS III process, but retained the elastomeric connector socket. HP also introduced an 8-bit 'nanoprocessor' (1820-1692), packaged in a 40-pin cerDIP. The hybrid microprocessor's packaging technology was used on the 5061-3020 20-bit shift register, the 00080-60106 hybrid ROM for the HP-80 business calculator, and the 00065-60218 hybrid calculator LSI, heart of the HP-65 programmable calculator.

There are two known lid variations seen on hybrid microprocessors. Earlier examples are equipped with a 'Type 1' lid, which has a dull finish and sharper edges, while later examples have a 'Type 2' lid, which has a more polished finish and rounded edges. The -3001 also has a third 'grey trace' variation with a Type 2 lid. Such grey trace examples are quite rare, as they were both preceded and succeeded by more typical gold trace variations. Type 1 lids are affixed to the substrate with a range of questionable substances. Type 2 lids are always affixed with an ample machine-applied strip of epoxy.

Hewlett-Packard A5061-3010 hybrid microprocessor, Type 1 lid, removed from the dual-processor CPU of a HP 9845A computer.

Hewlett-Packard 5061-3011 no-EMC variant hybrid microprocessor, designed as the Language Processing Unit (LPU) of the 9845A. Instead of the standard hybrid microcode, the 5061-3011 has an onboard BASIC interpreter.

Hewlett-Packard D5061-3001 AEC variant hybrid microprocessor, CPU of the 9845B and 9845C computers.

Hewlett-Packard D5061-3001 microprocessor, grey trace variant with Type 2 lid. Both earlier and later gold trace variations also exist. Note the handwritten serial number, which is present on some examples while absent on others.

Elastomeric compression connectors under magnification. This connector consists of flexible elastomer cylinders wrapped in numerous gold wire loops.

Hewlett-Packard C5061-3012 TACO tape drive controller. Like the hybrid microprocessor, this chip is heatsink-aligned to board-mounted elastomeric connectors. There is a gold trace variation of this IC, as well as the unusual 'green trace' variation shown here.

Hewlett-Packard 5061-3020 4x20-bit hybrid shift register, used as a line buffer in HP thermal printers.

Hewlett-Packard 5061-3055, a plug-in ROM for the 9845B computer.

This article is part of the [Digital Integrated Circuits] exhibit.

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